Shifting data display

ABSTRACT

A moving data display, especially suited to be an output device for a computer, utilizing an array of segmented display lamps. The circuit includes a plurality of shift registers equal in number to the number of segments in each lamp, with each shift register having a number of stages equal to the number of lamps.

United States Patent [I51 3,696,396

Ceschini Oct. 3, 1972 [S4] SHIFTING DATA DISPLAY [56] References Cited [72] inventor: Eugene S. Ceschini, Tarentum, Pa. UNTIED STATES PATENTS [73] Assignee: Gulf Research 8: Development Com- 3,493,957 2/1970 Brooks ..340/336 pany, Pittsburgh, Pa. 3,573,790 4/ l97l Schulenburg et al. 340/339 X 22 d: F 24 1971 Primary Examiner-David L. Trafton 1 le e Attorney-Meyer Neishloss, Deane E. Keith and Wil- [2l] Appl. No.: 118,230 liam Kovensky 57 ABSTRACT [52] US. Cl. ..340/336, 235/92 EA, 235/92 SH, 1 I

340,339 A mgvmg dtata display, especlallly suited to be ar; output evice or a computer, uti izing an array 0 segmented display lamps. The circuit includes a plurality of shift registers equal in number to the number of segments in each lamp, with each shift register having a number of stages equal to the number of lamps.

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SH/FT REGISTER LAMPS Na. 24 LAMPS N0. 28 SHIFT REGISTER 574/! 7' REGISTER I LAMPS Na. 84 LAMPS No. as SHIFT REGISTER SHIFT REGISTER Relay l 40.. Relay N0. 9 20 (30 .38 re wk 0am an n; 01:14)

42 DELAY INVENTOR EUGENE S. CESC'h'l/V/ SHIFTING DATA DISPLAY This invention pertains to means for displaying data. More specifically, the invention comprises an improved means to display continuous data. The data may be moved from right to left across the lamps to facilitate normal reading, as it is generated. Still more specifically, the invention pertains to a device of the character described particularly suited to be driven by a computer and to serve as a rapid read-out device of said computer.

The invention may include any desired number of segmented display lamps. A circuit is provided for cooperation with said lamps whereby the data to be displayed is fed into the composite display in parallel. Previous moving displays" often operated in a series manner, i.e., the coded data for sequentially operating the various segments of each lamp were fed in one by one, and then this series of pulses transferred to the next digit, in sequence, and so on, as each datum moved across the display. In the present invention, however, the coded data may be fed to all of the segments of a single lamp all at once, and then the entire combination of segments constituting a particular datum transferred, all at once, to the next data location. The parallel operation is preferred over serial input because it is faster and because less storage of data in the computer driving the display is required.

Because of computer limitations, particularly with small computers, such a scheme, which constitutes maximum efficiency, may not always be possible. The invention is broad enough to permit modification of its circuitry, while retaining substantially parallel input, to accommodate these limitations of modern small computers while achieving substantially the full advantages of the invention.

When used in an operator's console for a process control computer, the invention has several advantages over more conventional output means such as CR tubes, chart recorders, typewriters, and the like. These advantages include excellent visibility due to the large high resolution lamps used, ease of programming, and the lack of any need to cyclically regenerate characters due to the built-in memory of the invention display.

The above and other advantages of the invention will be pointed out or will become evident in the following detailed description and claims, and in the accompanying drawing also forming a part of the disclosure, in which:

FIG. 1 is a somewhat diagrammatic overall view of a display embodying the invention;

FIG. 2 is an enlarged showing of the type of lamp used in the invention;

FIG. 3 is a view illustrating how such a lamp displays the letter "E;

FIG. 4 is a table useful in explaining the operation of the invention;

and FIG. 5 is a diagram of the circuit used to drive the lamps.

Referring now to FIG. 1, there is shown a display made up of a plurality of individual lamps 12. Each lamp constitutes a digit location, and for the sake of convenience these locations are numbered 1 through N, indicating that an indefinite number of lamps can be included, as will appear more clearly below.

Referring to FIG. 2, there is shown a single one of the lamps I2. I have found it advantageous to use a 16 segmeat lamp. In the successfully constructed and used embodiment of the invention, such a lamp manufactured by Pinlites, Inc., of New Jersey, their Model No. l2-50A, trademark MAXI-LITE, was used. The sixteen segments have been numbered in a particular manner. The eight outside segments are numbered 1A through 8A starting at the lower right and proceeding clockwise. Similarly, the eight inside segments have been numbered 18 through 83 starting at the lower right diagonal segment and proceeding clockwise. Any lamp 12 can be caused to display any number, any letter of the alphabet, and certain special symbols, by lighting appropriate combinations of the l6 segments. This capability of segmented display lamps is well known to those skilled in the art. For example, as is shown in FIG. 3, the letter "e" is displayed by lighting segments 1A through 6A and 48.

FIG. 4 will be discussed in the Operation section below.

Referring now to FIG. 5, there is shown a schematic diagram of the embodiment of the circuit of the invention which has been successfully built and used. The overall logic of this circuit is to provide a number of shift registers equal to the number of segments on a single display lamp 12, and to provide in each shift register a number of stages equal to the number of digits or digit locations in the display 10. In the embodiment being described, therefore, there would be sixteen shift registers, each having N stages. In the operative embodiment, N was equal to eight. Each shift register is associated with a particular segment in all the display lamps 12. That is, each shift register controls a certain position, the 8A segments for example, on all of the lamps 12. In this manner it is possible to code each datum and input it in parallel, i.e., activate all the segments simultaneously in the first lamp needed to display that datum. It was not possible to achieve this ideal situation in the embodiment shown in FIG. 5 because of computer limitations, and not because of any limitation of the invention.

The showing of shift registers and the term shift register" as used in the specification and claims herein is exemplative only, and, as is obvious to those skilled in the art, the invention could operate with and shall be deemed broad enough to include any device in which data is stored and is moved in a sequential manner.

Referring back to FIG. 5, the computer is generally indicated at 14. In said operative embodiment, the computer used was a Digital Equipment Corporation PDP-S/ I, which is a 12 bit machine. Since 16 bits were not available, it was decided to use eight bits for data and two for control. The remaining two are used for other purposes. Ten relays, reference numeral 16, are therefore provided to interface computer 14 and the remaining circuitry. Each of the 10 relays comprises a coil 18 and a normally open contact 20. A power line 22 feeds all of the coils l8 and another power line 24 feeds all of the contacts 20. The arrangement of separate power lines 22 and 24 with the relays 16 yields the advantage of interconnecting computer 14 and display 10 in a secure and yet highly noise free manner. The showing of a relay type interface is exemplitive only, the invention could be used with any type of solid state switch which is not sensitive to noise spikes and provides some isolation.

The sixteen shift registers, only six of which are shown for the sake of simplifying the drawing, are labelled to correspond to the numbering of the lamp segments of FIG. 2. As there are only eight relays to drive the 16 shift registers, a dual branching output line 26 is associated with each relay contact 20, and each line 26 drives a pair of the shift registers. For example, relay number 1 will control the input to the two shift registers numbered 1A and 1B, and so on, to relay number 8 which controls the input to shift registers 8A and 8B and hence all the lamp segments 8A and 8B.

The last two relays numbers 9 and 10 are used to control the timing of the input from relays 1 to 8 to the sixteen shift registers. As can now be seen, if computer 14 was capable and/or sufficiently large there would have been provided 16 relays, each controlling one shift register, and the input to the display would have been done in the ideally perfect parallel manner. Relay 9 operates an A enable line 28 and also a delay circuit 30, such as a Schmitt trigger. In a similar manner, relay number 10 controls a B enable line 32 and feeds into a delay device 34 similar to delay device 30. Each line 28 and 32 has a branch going to each of its eight associated shift registers.

The outputs of the two delays 30 and 34 pass through a pair of pulse amplifiers 36 and thence come together at an or" gate 38. The signal from gate 38, hereinafter called the clock pulse, is present on a multibranching line 40 which feeds all of the shift registers and also feeds another delay circuit 42. After delay 42, the pulse on line 40 from or" gate 38 will operate the coil 44 of a relay 46, the contact 48 of which is disposed in a line 50 tapped into power line 24. Line 50 is tied to the interrupt facility of the computer and alerts the computer that the display is ready (all relays and logic are settled down) to accept another computer word of data.

OPERATION The computer 14 is suitably programmed, in a manner well known to those skilled in the programming art, so that for each datum to be displayed the computer will first determine which of the A group of lamp segments are to be lit by a first operation of the relays 1 through 8, and then which B lamp segments are to be lit for a second operation of these same relays. Thus, the relays 1 through 8 operate twice per datum. The nature of each shift register is such that it will accept a new datum and shift the old data only when it has first received both an enable pulse, on a respective one of lines 28 or 32, and a clock pulse on multiple branching line 40.

Referring now to FIGS. 4 and simultaneously, the invention will be explained, by way of example, by explaining the manner of displaying the word THE". Computer 14 first causes relay 9 to operate, thus enabling the A set of shift registers and providing a clock pulse on line 40 via delay 30, an amplifier 36 and "or gate 38. At this time the clock pulse which also feeds the B shift registers is meaningless. The delays provided by the devices 30, 34 and 42 are required because the shift registers and certain other parts of the circuitry respond at electronic speeds in that they are solid state, and the relays require slightly more time for their mechanical operation. Simultaneously with the operation of relay 9, relays 5 and 6 close, under the control of computer 14, thereby lighting lamp segments 5A and 6A only of the lamp 12 in digit location 1. Referring to the upper right hand corner of FIG. 4, this condition is represented. The clock pulse from "or" gate 38 at this same time is feeding back via delay 42 and relay 46 to provide a pulse on line 50 back to computer 14 to indicate to the computer that the display is in condition to receive the next set of relay operations. The next occurrence then is that relay number 10 operates, putting a signal on B enable line 32. Simultaneously relays 2 and 6 only operate thus lighting lamp segments 28 and 6B. The feedback system again operates to provide a pulse on line 50 indicating that the next operation may commence. Of course, all of the above is driven by the computer and hence happens at very high speed so that the effect on the eyes of a viewer, if the letter T constituted the entire display, would be the sudden appearance, substantially all at once, of the letter T at digit location 1. Of course, in fact, there is a minute time delay between lighting of the horizontal bar and then lighting of the vertical bar of the T. It can readily be appreciated that segments 5A, 6A, 6B and 28 display the letter T. The next operation of the relays, after a delay sufficient to allow the eyes of a viewer to respond to the T", will light segments 3, 4, 7 and 8 of the A set, and the next operation will light segments 4 and 8 of the B set, in the manner described, thus inputting the letter H in the display, after previously automatically causing the letter T to shift to the left. The shifting is inherent in the operation of a shift register every time it receives a clock pulse on line 40. The next two relay operations put in the letter E" shifting the letter T to the number 3 digit location and the letter H to the number 2 digit location, which condition is illustrated on the left hand side of FIG. 4.

Thus, the invention provides a simple and highly reliable circuit by which relatively long computer messages can be displayed in an easy to read manner on a relatively small display console. In said operative embodiment, audible signal means have been added to the console to call the operators attention to the fact that a message is being displayed, along with a keyboard to input data to the computer, to provide an improved complete console which is easy for operators to use.

As was explained above, ideally, l7 relays would be used to interface a computer and the display of the invention, sixteen for data, one for clock pulses. The relatively small general purpose digital computers which are popular today for various functions in industry generally do not have this capability, and it is an advantage of the invention that it may be used with such small computers. The invention can be further modified for even smaller computers in other manners. For example, only four relays could be used to drive the shift registers, appropriate changes being made in the timing and enabling circuitry. In such a case, only one relay would be needed for timing, and the other changes would be only minor. The programming of the computer required by the invention is similar to that needed for the usual typewriter output.

While the invention has been described in detail above, it is to be understood that this detailed description is by way of example only, and the protection granted is to be limited only within the spirit of the invention and the scope of the following claims.

I claim:

1. A circuit for displaying data comprising a first number of segmented display lamps, each of said lamps having a second number of segments, said circuit including a plurality of shift registers equal in number to said second number, each of said shift registers having a number of stages equal to said first number, and each one of said shift registers being associated with all the lamp segments in a respective lamp segment location of all of said lamps.

2. The circuit of claim 1, wherein said second number is sixteen.

3. The circuit of claim 1, and a source of data, and means to input data from said source to said shift registers in parallel.

4. The circuit of claim 3, wherein the source of data is a general purpose digital computer, and said input means comprise a plurality of relays interposed between the input of said shift registers and the output of said computer.

5. The circuit of claim 4, wherein each of said relays is associated with at least two of said shift registers, and wherein timing and enabling means permit said computer to drive a portion of the total number of shift registers, whereby said circuit is accommodated to a computer having a bit word capacity.

6. The circuit of claim 4, wherein said first number is eight and said second number is 16, said input means comprising eight relays each of which is associated with a pair of said shift registers, and timing and enabling means operated by said computer to enable first eight of said shift registers and then the second eight of said shift registers, whereby said computer operates said relays twice to input each datum.

7. The circuit of claim 6, said timing and enabling means comprising two additional relays operated by said computer, means for utilizing the pulse from each of said two additional relays to enable a respective set of eight of said shift registers and to provide a timing pulse to all of the shift registers. 

1. A circuit for displaying data comprising a first number of segmented display lamps, each of said lamps having a second number of segments, said circuit including a plurality of shift registers equal in number to said second number, each of said shift registers having a number of stages equal to said first number, and each one of said shift registers being associated with all the lamp segments in a respective lamp segment location of all of said lamps.
 2. The circuit of claim 1, wherein said second number is sixteen.
 3. The circuit of claim 1, and a source of data, and means to input data from said source to said shift registers in parallel.
 4. The circuit of claim 3, wherein the source of data is a general purpose digital computer, and said input means comprise a plurality of relays interposed between the input of said shift registers and the output of said computer.
 5. The circuit of claim 4, wherein each of said relays is associated with at least two of said shift registers, and wherein timing and enabling means permit said computer to drive a portion of the total number of shift registers, whereby said circuit is accommodated to a computer having a bit word capacity.
 6. The circuit of claim 4, wherein said first number is eight and said second number is 16, said input means comprising eight relays each of which is associated with a pair of said shift registers, And timing and enabling means operated by said computer to enable first eight of said shift registers and then the second eight of said shift registers, whereby said computer operates said relays twice to input each datum.
 7. The circuit of claim 6, said timing and enabling means comprising two additional relays operated by said computer, means for utilizing the pulse from each of said two additional relays to enable a respective set of eight of said shift registers and to provide a timing pulse to all of the shift registers. 